Method of forming semiconductor device

A method, comprising:

• forming a first transistor and a second transistor over the first transistor;
• forming a first hard mask layer over the second transistor, wherein the first hard mask layer comprises a bottom nitride layer, a top nitride layer and an amorphous semiconductive layer directly between the bottom nitride layer and the top nitride layer;
• patterning the first hard mask layer;
• forming a first trench extending through gate structures of the first transistor and the second transistor;
• forming a vertical local interconnect (VLI) structure in the first trench, the VLI structure electrically connecting a source/drain region of the first transistor to a source/drain region of the second transistor;
• performing a first polishing process to the VLI structure and the first hard mask layer, wherein the first polishing process stops at a level of the amorphous semiconductive layer;
• and
• after the first polishing process stops, performing a second polish process to the VLI structure, the bottom nitride layer and the amorphous semiconductive layer.

A method comprising:

• forming a first transistor and a second transistor, wherein the second transistor overlaps the first transistor;
• forming a hard mask layer over the second transistor, comprising:
• forming a bottom mask layer;
• forming an oxygen-free polish stop layer over the bottom mask layer;
• forming a protective layer over the oxygen-free polish stop layer;
• and
• forming an oxide layer over the protective layer;
• patterning the hard mask layer;
• forming a trench in gate structures of the first and second transistors;
• forming an oxygen-free liner in the trench;
• forming an oxide insulating layer over the oxygen-free liner;
• and
• performing a polishing process to the hard mask, the oxygen-free liner and the oxide insulating layer, wherein the polishing process stops at a level of the oxygen-free polish stop layer.