Semiconductor devices and electronic systems including the same

A semiconductor device comprising:

• a peripheral circuit structure comprising a substrate, a peripheral circuit arranged over the substrate, and a peripheral circuit line structure connected to the peripheral circuit;
• a common source plate arranged over the peripheral circuit structure;
• a plurality of gate lines comprising a first gate line arranged over the common source plate and a second gate line arranged over the first gate line;
• a plurality of insulating layers respectively arranged between the plurality of gate lines;
• a plurality of channel structures that penetrate the plurality of gate lines in a vertical direction perpendicular to an upper surface of the substrate;
• a first separation pattern that is horizontally spaced apart from the plurality of channel structures and that penetrates the plurality of gate lines in the vertical direction;
• and
• a second separation pattern that is horizontally spaced apart from the first separation pattern and that overlaps at least a portion of the plurality of channel structures in the vertical direction,
• wherein the second separation pattern penetrates at least a portion of the second gate line and at least a portion of a first channel structure of the plurality of channel structures, the first channel structure overlapping the second separation pattern in the vertical direction, and
• wherein the second gate line is filled completely with a conductive material.

An electronic system comprising:

• a main board;
• a semiconductor device over the main board;
• and
• a controller that is electrically connected to the semiconductor device,
• wherein the semiconductor device comprises:
• a plurality of gate lines comprising a first gate line that is arranged over a substrate and a second gate line that is arranged over the first gate line;
• a plurality of insulating layers respectively arranged between the plurality of gate lines;
• a plurality of channel structures that penetrate the plurality of gate lines in a vertical direction that is perpendicular to an upper surface of the substrate;
• and
• a separation pattern that overlaps at least a portion of the plurality of channel structures in the vertical direction,
• wherein the separation pattern penetrates at least a portion of the second gate line and at least a portion of a first channel structure of the plurality of channel structures, the first channel structure overlapping the separation pattern in the vertical direction, and
• wherein the second gate line is filled completely with a conductive material.