US 2025/0211172 A1 · TRANSISTOR CIRCUITS WITH INDEPENDENTLY BIASED FIELD PLATES

Abstract

Improved transistor performance for RF switching and amplification can be achieved by providing a transistor such as a electron mobility transistor with one or more field plate electrodes coupled to the channel of the transistor that can be biased independently of the gate electrode and the current terminals of the transistor. For example, when the field plate electrode(s) are biased to at least partially deplete the channel near the field plate electrode(s), the breakdown voltage characteristics of the transistor can be improved. In RF applications, circuitry that biases the field plate electrodes can be powered by RF signals already present in the circuitry in which the transistor is incorporated, removing the need to provide a separate bias voltage source for the field plate electrode(s).

Claims20

Dependent claims

An electronic device, comprising:

an input node and an output node;
a transistor comprising:
a first current terminal coupled to the output node;
a second current terminal;
a semiconductive channel region disposed between the first current terminal and the second current terminal;
a gate electrode electrically coupled to the semiconductive channel region and coupled to the input node;
a field plate electrode electrically coupled to the semiconductive channel region and disposed adjacent to the gate electrode;
and
field-plate bias circuitry coupled to the field plate electrode and configured to apply a desired field plate bias voltage to the field plate electrode that at least partially depletes the channel region of charge carriers near the field plate electrode.

6 more elements

An amplifier device comprising:

an input node configured to receive a radiofrequency (RF) input signal;
an output node configured to output an amplified signal corresponding to the RF input signal;
a transistor configured to amplify the RF input signal, wherein the transistor comprises:
a first current terminal;
a second current terminal;
a semiconductive channel coupled between the first current terminal and the second current terminal;
a gate electrode disposed between the first current terminal and the second current terminal and coupled to the semiconductive channel and configured to modulate an output of the transistor in response to the RF input signal;
and
a field plate electrode that is adjacent to the gate electrode and also coupled to the semiconductive channel;
and
field-plate bias circuitry coupled to the field plate electrode and configured to apply a desired field plate bias voltage to the field plate electrode that at least partially depletes the channel region of charge carriers near the field plate electrode.

8 more elements

A Doherty amplifier comprising:

an input node configured to receive a radiofrequency (RF) input signal;
an output node configured to output an amplified signal corresponding to the RF input signal;
a carrier amplifier signal path that includes:
a first transistor configured to amplify the RF input signal over a first input power range of the RF input signal, wherein the transistor comprises:
a first current terminal;
a second current terminal;
a semiconductive channel coupled between the first current terminal and the second current terminal;
a gate electrode disposed between the first current terminal and the second current terminal and coupled to the semiconductive channel and configured to modulate an output of the transistor in response to the RF input signal;
a field plate electrode that is adjacent to the gate electrode and also coupled to the semiconductive channel;
and
a peaking amplifier signal path that includes:
a second transistor configured to further amplify the RF input signal over a second input power range of the RF input signal, wherein the second transistor comprises:
a first current terminal;
a second current terminal;
a semiconductive channel coupled between the first current terminal and the second current terminal;
a gate electrode disposed between the first current terminal and the second current terminal and coupled to the semiconductive channel and configured to modulate an output of the transistor in response to the RF input signal;
a field plate electrode that is adjacent to the gate electrode and also coupled to the semiconductive channel;
and
field-plate bias circuitry coupled to the field plate electrodes of the first transistor and the second transistor;
wherein the field plate bias circuitry is configured to apply a desired first field plate voltage to the field plate electrode of the first transistor and to apply a desired second field plate voltage to the field plate electrode of the second transistor;
and
wherein the desired first and second field plate voltages are configured to at least partially deplete the channel regions of the first transistor and the second transistor of charge carriers near the field plate electrodes of the first and second transistors, respectively.

19 more elements

Dependencies are inferred from the claim text.

Transistor circuits with independently biased field plates

Life of this patent

Transistor circuits with independently biased field plates

Life of this patent

Abstract

Claims20