Semiconductor device and method

A method, comprising:

• forming a first structure including a first surface and a second surface opposite the first surface, wherein forming the first structure comprises:
• forming a first interconnect structure over a first substrate, the first interconnect structure comprising an active metallization pattern and a guard ring;
• forming a first through substrate via (TSV) through the first interconnect structure and the first substrate, the guard ring surrounding the first TSV in the first interconnect structure;
• and
• forming first bond pads over the first interconnect structure and connected to the first TSV and the active metallization pattern of the first interconnect structure, the first bond pads being on the first surface of the first structure;
• forming a second structure including a first surface and a second surface opposite the first surface;
• bonding the first surface of the first structure to the first surface of the second structure;
• after bonding, forming a second TSV from the second surface of the first structure to the first interconnect structure, the second TSV having a smaller width than the first TSV;
• exposing the first TSV at the second surface of the first structure;
• and
• forming second bond pads on the second surface of the first structure, the second bond pads being electrically coupled to the first and second TSVs.

A method, comprising:

• forming a first structure, wherein forming the first structure comprises:
• forming a first interconnect structure over a first substrate, the first interconnect structure comprising a metallization pattern;
• forming a first through substrate via (TSV) through the first interconnect structure and the first substrate;
• and
• forming first bond pads over the first interconnect structure and connected to the first TSV and the metallization pattern of the first interconnect structure;
• bonding the first structure to a second structure;
• after bonding, forming a second TSV through the first substrate of the first structure to the first interconnect structure, the second TSV having a smaller width than the first TSV;
• thinning the first substrate, wherein thinning exposes the first TSV;
• and
• forming second bond pads on the first structure, the second bond pads being electrically coupled to the first and second TSVs.