Apparatus and method of implementing a probabilistic bit (p-bit) circuit with enhanced tunability

Abstract

An apparatus and method for implementing a probabilistic bit (p-bit) circuit with enhanced tunability is disclosed. The apparatus includes multiple magnetic tunnel junctions (MTJs) connected in series to a drain of a transistor. The apparatus also includes a resistor connected to a source of the transistor. The resistor is of a resistance value that is selected based on an average equivalent resistance value of a series combination of the multiple MTJs. The apparatus includes a comparator configured to receive voltage from the drain (“drain voltage”) and generate an output voltage based on a reference voltage and the drain voltage. The method includes generating, using a first circuitry, a drain voltage that is fluctuating over time, and generating, using a second circuitry, an output voltage that is varying continuously over time by comparing the fluctuating voltage with a reference voltage.

Dependencies are inferred from the claim text.