Method of fabricating a semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Ting Ko, Bi-Fen Wu, Chi-On Chui
Life of this patent
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Abstract
A semiconductor device including a gate structure disposed on a substrate is provided. The gate structure includes a work function setting layer and a work function tuning layer sequentially disposed on substrate. The work function tuning layer is in contact with an interface surface positioned between the work function setting layer and the work function tuning layer, and a material of the interface surface is different from the work function setting layer.
Claims20
A method of fabricating a semiconductor device, comprising:
- forming a work function setting layer on a substrate;
- performing a local halogen treatment on a first portion of the work function setting layer;
- and
- growing a work function tuning layer on the work function setting layer, wherein the work function tuning layer on the first portion of the work function setting layer has a different thickness from the work function tuning layer on a second portion of the work function setting layer after a same process time of growing the work function tuning layer.
A method of fabricating a semiconductor device, comprising:
- forming a first work function setting layer of a first transistor and a second work function setting layer of a second transistor on a substrate;
- and
- forming a first work function tuning layer of the first transistor on a first interface surface over the first work function setting layer and forming a second work function tuning layer of the second transistor on a second interface surface over the second work function setting layer using a same deposition process, wherein the first work function tuning layer has a different thickness from the second work function tuning layer after a same process time of the same deposition process.
A method of fabricating a semiconductor device, comprising:
- forming a first work function setting layer of a first transistor and a second work function setting layer of a second transistor on a substrate;
- and
- forming a first work function tuning layer of the first transistor on the first work function setting layer and forming a second work function tuning layer of the second transistor on the second work function setting layer using a same deposition process, wherein the first work function tuning layer is formed to have a thickness different from the second work function tuning layer after a same process time of the same deposition process, the first work function tuning layer is deposited on a first interface surface, the second work function tuning layer is deposited on a second interface surface, and one of the first interface surface and the second interface surface comprises a halogen material.
Dependencies are inferred from the claim text.