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US 2025/0169092 A1Published application
Radical Treatment in Supercritical Fluid for Gate Dielectric Quality Improvement to CFET Structure
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsCheng-Ming LIN, Kenichi SANO, Wei-Yen WOON, Szuya LIAO
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Abstract
The present disclosure provides a method that includes providing a semiconductor structure having a bottom channel region and a top channel region over the bottom channel region; forming a gate dielectric layer over and wrapping around top channels in the top channel region; performing a radical treatment on the dielectric layer in a supercritical fluid; and forming a metal gate electrode on the dielectric layer.
Claims20
A method, comprising:
- providing a semiconductor structure having top channels;
- forming a first dielectric layer to wrap around each of the top channels;
- applying a first supercritical carbon dioxide fluid to the first dielectric layer;
- forming a second dielectric layer on the first dielectric layer and wrapping around the top channels;
- applying a second supercritical carbon dioxide fluid to the second dielectric layer;
- and
- forming a gate electrode on the second dielectric layer.
4 more elements
A method, comprising:
- providing a semiconductor structure having top channels;
- forming a first dielectric layer that is wrapping around the top channels in the top channels;
- performing a first radical treatment to the first dielectric layer in a first supercritical carbon dioxide fluid having a first radical chemical dissolved therein;
- forming a second dielectric layer over the first dielectric layer and wrapping around the top channels, the second dielectric layer having a dielectric constant greater than that of the first dielectric layer;
- and
- performing a second radical treatment to the second dielectric layer in a second supercritical carbon dioxide fluid having a second radical chemical dissolved therein, the second radical chemical being different from the first radical chemical.
3 more elements
A method, comprising:
- forming bottom channels vertically stacked on a bottom substrate;
- forming a bottom source and a bottom drain on the bottom substrate, the bottom source and the bottom drain being interposed by the bottom channels;
- forming a bottom interfacial layer wrapping around each of the bottom channels;
- performing a thermal annealing process to the bottom interfacial layer at a first temperature greater than 900° C.;
- forming a semiconductor stack of first semiconductor layers and second semiconductor layers alternatively stacked on a top substrate;
- bonding the semiconductor stack formed on the top substrate to the bottom substrate;
- thinning down the top substrate such that the semiconductor stack is exposed;
- patterning the semiconductor stack to form an active region;
- forming a top source and a top drain in the active region interposed by top channels;
- forming a top gate dielectric layer wrapping around the top channels;
- and
- performing a radical treatment to the top gate dielectric layer in a supercritical carbon dioxide fluid at a second temperature less than 200° C.
9 more elements
Dependencies are inferred from the claim text.