US 2025/0169065 A1 · SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME

Abstract

A semiconductor device includes a substrate, a plurality of bit lines, an insulating layer and a plurality of plugs. The substrate includes a plurality of active areas. The bit lines are separated from each other and disposed on the substrate. The insulating layer overlies a top surface of the substrate. The plugs are disposed on the top surface of the insulating layer and separated from the active areas. The plugs and the bit lines are alternately arranged along a first direction, and the plugs include a plurality of first plugs and at least one second plug. Accordingly, structural defects possibly occurring in a semiconductor device can be effectively ameliorated, so as to form a semiconductor device with improved reliability of components.

Claims20

Dependent claims

A semiconductor device, comprising:

a substrate comprising a plurality of active areas;
a plurality of bit lines separated from each other and disposed on the substrate;
an insulating layer overlying a top surface of the substrate;
and
a plurality of plugs disposed on a top surface of the insulating layer and separated from the plurality of active areas, wherein the plurality of plugs and the plurality of bit lines are alternately arranged along a first direction, and the plurality of plugs comprise a plurality of first plugs and at least one second plug.

2 more elements

A method of forming a semiconductor device, comprising:

providing a substrate, the substrate comprising a plurality of active areas;
forming a plurality of bit lines, the plurality of bit lines being separated from each other and disposed on the substrate;
forming an insulating layer on the substrate and overlying a top surface of the substrate;
and
forming a plurality of plugs on the insulating layer, the plurality of plugs being separated from the plurality of active areas, wherein the plurality of plugs and the plurality of bit lines are alternately arranged along a first direction, and the plurality of plugs comprise a plurality of first plugs and at least one second plug.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application

18/820,200Filed 29 Aug 2024

Priority

CN 202311540903.417 Nov 2023

Published

22 May 2025

Term ends

Not estimatedThe source records don’t support an estimate.

Classification6 codes

H10B 12/485
Data lines or contacts therefor: bit line contacts
H10B 12/0335
The capacitor extending over the transistor: making a connection between the transistor and the capacitor, e.g. plug
H10B 12/09
Manufacture or treatment: with simultaneous manufacture of the peripheral circuit region and memory cells
H10B 12/315
Having a storage electrode stacked over the transistor: with the capacitor higher than a bit line

Semiconductor device and method of forming the same

Life of this patent

Semiconductor device and method of forming the same

Life of this patent

Abstract

Claims20