Semiconductor device

A semiconductor device comprising:

• a lower electrode;
• an upper electrode on the lower electrode;
• and
• a dielectric layer structure between the lower electrode and the upper electrode, and
• wherein the dielectric layer structure includes
• a first dielectric layer in contact with the lower electrode,
• a second dielectric layer in contact with the first dielectric layer, and
• a third dielectric layer in contact with the upper electrode,
• wherein the second dielectric layer includes
• a plurality of ferroelectric material layers and a plurality of anti-ferroelectric material layers alternately stacked, and
• a silicon dopant is included in at least one of a region adjacent to an interface between the first dielectric layer and the lower electrode, and
• a region adjacent to an interface between the third dielectric layer and the upper electrode.

A semiconductor device comprising:

• a substrate having a plurality of active regions defined by device isolation layers;
• a lower structure on the substrate and connected to the plurality of active regions;
• and
• a capacitor structure on the lower structure and connected to the lower structure,
• wherein the capacitor structure includes
• a lower electrode,
• an upper electrode on the lower electrode, and
• a dielectric layer structure between the lower electrode and the upper electrode,
• wherein the dielectric layer structure includes
• a first dielectric layer in contact with the lower electrode,
• a second dielectric layer in contact with the first dielectric layer, and
• a third dielectric layer in contact with the upper electrode,
• wherein each of the first dielectric layer, the second dielectric layer, and the third dielectric layer includes at least one of HfO2 and ZrO2, and
• a silicon dopant is included inside of the first dielectric layer and inside of the third dielectric layer.