Gate drive circuitry and power converter

A gate drive circuitry configured to drive a semiconductor switching element:

• including a gate terminal;
• a drain terminal and a source terminal;
• and incorporating at least one of an antiparallel diode or a body diode, the gate drive circuitry comprising:
• a voltage detection circuitry configured to detect a first voltage that is a voltage between the drain terminal and the source terminal;
• a controller configured to generate a drive signal for driving the semiconductor switching element;
• and
• a gate driver configured to generate a drive voltage for driving the semiconductor switching element based on the drive signal and apply the drive voltage to the gate terminal, wherein
• the controller includes:
• a first table that is a table indicating the first voltage in a correspondence between a first current and a junction temperature, the first current flowing from the source terminal to the drain terminal when the semiconductor switching element is in an asynchronous rectification state, and the junction temperature being of the semiconductor switching element when the first current flows in the semiconductor switching element;
• and
• a second table that is a table indicating the first voltage in a correspondence between a second current and a junction temperature, the second current flowing from the source terminal to the drain terminal when the semiconductor switching element is in a synchronous rectification state, and the junction temperature being of the semiconductor switching element when the second current flows in the semiconductor switching element,
• the voltage detection circuitry is configured to:
• detect the first voltage at a first timing at which the semiconductor switching element is in the asynchronous rectification state;
• and
• detect the first voltage at a second timing at which the semiconductor switching element is in the synchronous rectification state, and
• the controller is configured to:
• perform processing of uniquely identifying at least one of a junction temperature of the semiconductor switching element and a current flowing through the semiconductor switching element at the first and second timings from the first and second tables, by using two detection values of the first voltage detected at the first and second timings.