Back to results
US 2025/0167129 A1Published application
Method of manufacture overlay mark using laser marking process for semiconductor device
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsJing-Cheng Lin, Chen-Hua Yu, Po-Hao Tsai
Life of this patent
Estimating the term…
Abstract
A semiconductor device has a conductive via laterally separated from the semiconductor, an encapsulant between the semiconductor device and the conductive via, and a mark. The mark is formed from characters that are either cross-free characters or else have a overlap count of less than two. In another embodiment the mark is formed using a wobble scan methodology. By forming marks as described, defects from the marking process may be reduced or eliminated.
Claims20
A device comprising:
- a redistribution layer;
- a semiconductor device overlying the redistribution layer;
- a via adjacent to the semiconductor device;
- an encapsulant surrounding the semiconductor device and in physical contact with the via;
- a protective layer over the encapsulant;
- and
- a marking within the protective layer, the marking comprising a series of circular shapes, each of the series of circular shapes overlapping adjacent ones of the series of circular shapes, the marking having a width that is equal to a width of the circular shapes, and wherein the plurality of circular shapes have a plurality of depths less than 8.03 μm.
4 more elements
A device comprising:
- a protective layer, the protective layer comprising:
- first openings that fully extend through the protective layer to expose a conductive via;
- and
- second openings that partially extend through the protective layer, the second openings forming a cross-free character comprising at least one laser pulse exposure region 80;
- a first semiconductor device laterally removed from the conductive via;
- and
- an encapsulant extending from being in physical contact with the first semiconductor device to being in physical contact with the conductive via.
4 more elements
A device comprising:
- a first opening in a protective layer, the first opening exposing a via;
- a second opening in the protective layer, the second opening being part of a cross-free character with a first width, the first width being as large as a circular depression within the second opening, the circular depression having a depth of less than 8.03 μm;
- an encapsulant in physical contact with the via;
- a first semiconductor device embedded within the encapsulant;
- a redistribution layer on an opposite side of the via from the protective layer;
- and
- external contacts in physical contact with the redistribution layer.
4 more elements
Dependencies are inferred from the claim text.