Cell block for high-performance semiconductor device

A semiconductor device based on a cell block which comprises:

• a 1st cell comprising a 1st lower active region and a 1st upper active region extended in a 1st direction, a width of the 1st upper active region being smaller than a width of the 1st lower active region in a 2nd direction, and the 1st upper active region partially overlapping the 1st lower active region in a 3rd direction;
• and
• a 2nd cell abutting the 1st cell in the 2nd direction, and comprising a 2nd lower active region and a 2nd upper active region extended in the 1st direction, a width of the 2nd upper active region being smaller than a width of the 2nd lower active region in the 2nd direction, and the 2nd upper active region partially overlapping the 2nd lower active region in the 3rd direction,
• wherein the 3rd direction vertically intersects the 1st direction and the 2nd direction which horizontally intersect each other,
• wherein the width of the 2nd upper active region is smaller than the width of the 1st upper active region, and
• wherein the width of the 2nd lower active region is smaller than the width of the 1st lower active region.

A semiconductor device based on a cell block which comprises:

• a 1st cell comprising a 1st lower active region and a 1st upper active region above the 1st lower active region in a 3rd direction, both being extended in a 1st direction;
• a 2nd cell comprising a 2nd lower active region and a 2nd upper active region above the 2nd lower active region in the 3rd direction, both being extended in the 1st direction;
• and
• a cell spacer between the 1st cell and the 2nd cell in a 2nd direction,
• wherein no active region is formed in the cell spacer, and
• wherein the 3rd direction vertically intersects the 1st direction and the 2nd direction which horizontally intersect each other.