Memory repair circuit, a memory repair method, and a memory device

A memory device comprising:

• a plurality of memory packages;
• and
• a memory repair circuit configured to:
• perform a first repair analysis to obtain first fail information for the plurality of memory packages, the first fail information including one or more fail addresses and a fail bit count for the one or more fail addresses,
• select a target address from among the one or more fail addresses,
• lock the target address,
• perform a second repair analysis to obtain second fail information for the plurality of memory packages excluding the target address for the one or more fail addresses, and
• output a result of the first repair analysis and the second repair analysis.

A memory device comprising:

• a plurality of memory packages;
• and
• a memory repair circuit configured to:
• perform a first repair analysis to obtain first fail information for the plurality of memory packages, the first fail information including:
• a first set of fail addresses associated with at least one memory package of the plurality of memory packages, and
• a first set of fail bit counts, each fail bit count of the first set of fail bit counts being associated with one or more fail addresses of the first set of fail addresses,
• select a target address from among the first set of fail addresses,
• lock the target address,
• perform a second repair analysis to obtain second fail information for the plurality of memory packages, the second fail information including:
• a second set of fail address associated with at least one memory package of the plurality of memory packages excluding the target address from the first set of fail addresses, and
• output a result of the first and second repair analyses, the result comprising one or more first fail bits.

An operating method of a memory device comprising a plurality of memory packages, the method comprising:

• performing a first repair analysis to obtain first fail information for the plurality of memory packages, the first fail information including one or more fail addresses and a fail bit count for the one or more fail addresses;
• selecting a target address from among the one or more fail addresses;
• locking the target address,
• performing a second repair analysis of obtaining second fail information for the plurality of memory packages excluding the target address in the one or more fail addresses;
• and
• outputting a result of the first repair analysis and the second repair analysis.