Operation methods of memory, memory and memory systems

A memory, comprising:

• a memory array comprising a plurality of memory blocks and a plurality of word lines coupled to the memory blocks;
• and
• a peripheral circuit coupled to the plurality of word lines, and configured to:
• apply a pass voltage to the plurality of word lines after a first read operation and before a second read operation;
• apply the pass voltage to the plurality of word lines in a pre-turn-on stage of the second read operation;
• and
• apply a first read voltage to a first word line of the plurality of word lines in a read stage of the second read operation,
• wherein the pass voltage is greater than the first read voltage.

A memory system, comprising:

• a memory, comprising:
• a memory array comprising a plurality of memory blocks and a plurality of word lines coupled to the memory blocks;
• and
• a peripheral circuit coupled to the plurality of word lines, and configured to:
• apply a pass voltage to the plurality of word lines after a first read operation and before a second read operation;
• apply the pass voltage to the plurality of word lines in a pre-turn-on stage of the second read operation;
• and
• apply a first read voltage to a first word line of the plurality of word lines in a read stage of the second read operation,
• wherein the pass voltage is greater than the first read voltage, and
• a memory controller configured to control the memory.