Loading patent…
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., Tsmc Nanjing Company, Limited
InventorsJun-Cheng LIU, Zhi-Min ZHU, Chien-Yu HUANG, Cheng Hung LEE, Hung-Jen LIAO
Estimating the term…
A memory device includes a memory cell in a first power domain of a first power supply voltage, a bit line coupled to the memory cell, and a write assist circuit. The write assist circuit includes an input, an output electrically couplable to the bit line in a write operation of the memory cell, an input circuit electrically coupled to the input, and an output circuit electrically coupled between the input circuit and the output. The input circuit is in a second power domain of a second power supply voltage different from the first power supply voltage, and the output circuit is in the first power domain.
A memory device, comprising:
A write assist circuit for a memory array, the write assist circuit comprising:
A method, comprising, in a write operation of a memory cell electrically coupled to a word line and a bit line,
Dependencies are inferred from the claim text.