Sensing amplifier of memory array, memory device and data read method with two state reference voltages

A memory device, comprising:

• a memory array, the memory array includes a data cell, a first reference cell with a first state and a second reference cell with a second state;
• and
• a sensing amplifier, coupled to the memory array,
• wherein the sensing amplifier comprises:
• a sampling circuit, having a first sampling node, a second sampling node, a first state reference node coupling to the first reference cell to receive a first state reference voltage, a second state reference node coupling to the first reference cell to receive a second state reference voltage, an output node and an inverted output node, wherein the first sampling node and the second sampling node are coupled to the data cell, wherein the sampling circuit obtains a data voltage of the data cell, the first state reference voltage, and the second state reference voltage according to a bit line pre-charge signal and a standby signal, and the sampling circuit compares the data voltage, the first state reference voltage, and the second state reference voltage according to the bit line pre-charge signal and a word line to generate a first sampling signal on the output node and a second sampling signal on the inverted output node;
• a latch circuit, coupled to the sampling circuit, wherein the latch circuit implements that the first sampling signal and the second sampling signal are inverted signals and latches the first sampling signal on the output node and the second sampling signal on the inverted output node;
• and
• a reset circuit, coupled to the sampling circuit, resetting the first sampling node, the second sampling node, the first state reference node, and the second state reference node as a preset voltage according to a standby signal.

A data read method of the memory array, wherein the memory array includes a data cell, a first reference cell with a first state and a second reference cell with a second state, the data read method comprising:

• resetting a first sampling node, a second sampling node, a first state reference node, and a second state reference node of a sampling circuit in a sensing amplifier as a preset voltage according to a standby signal;
• obtaining data voltages of the data cell on the first sampling node and the second sampling node of the sampling circuit, obtaining a first state reference voltage of the sampling circuit according to the first reference cell, and obtaining a second state reference voltage according to the second reference cell on the second state reference node of the sampling circuit according to a bit line pre-charge signal and the standby signal;
• comparing the data voltages, the first state reference voltage, and the second state reference voltage according to the bit line pre-charge signal and a word line to generate a first sampling signal on the output node and a second sampling signal on the inverted output node by the sampling circuit in the sensing amplifier;
• and
• implementing that the first sampling signal and the second sampling signal are inverted signals and latching the first sampling signal on the output node and the second sampling signal on the inverted output node by a latch circuit in the sensing amplifier.