Reduced Acceleration Structures for Ray Tracing Systems

A computer-implemented method of performing intersection testing in a ray tracing system to process a 3D scene, wherein the method comprises:

• traversing a first acceleration structure;
• and
• in response to the traversal of the first acceleration structure resulting in a miss for the ray, emitting the ray into a further acceleration structure and traversing the further acceleration structure, wherein the further acceleration structure is a hierarchical acceleration structure.

A non-transitory computer readable storage medium having stored thereon a computer readable dataset description of an integrated circuit that, when processed in an integrated circuit manufacturing system, causes the integrated circuit manufacturing system to manufacture a ray tracing unit which is configured to process a 3D scene, wherein the ray tracing unit comprises:

• intersection testing logic configured to perform intersection testing by traversing a first acceleration structure, wherein the intersection testing logic is configured to emit a ray into a further acceleration structure and traverse the further acceleration structure, if the traversal of the first acceleration structure results in a miss for the ray, wherein the further acceleration structure is a hierarchical acceleration structure.