Neural network on-chip mapping method and apparatus based on tabu search algorithm

A neural network on-chip mapping method based on a tabu search algorithm, comprising following steps:

• step 1, acquiring a topological structure and parameter information of a spiking neural network to be deployed and constraint information of computing cores of a target machine network-on-chip;
• step 2, converting the spiking neural network into a directed acyclic graph (DAG), and determining neuron sequences to be assigned according to topological sorting in the DAG;
• step 3, from a pre-specified initial computing core in the network-on-chip, sequentially assigning the neuron sequences in clusters, and mapping and placing, by using a nearest neighbor algorithm, the neuron sequences one by one on the computing cores of the network-on-chip to construct an initial solution of mapping;
• step 4, defining and initializing a tabu search table and a timer, calculating cost functions of all computing cores, and selecting candidate computing cores according to the cost functions, to construct a candidate set;
• step 5, establishing an integer programming model for a selected and constructed candidate set and calculating an optimal solution, and swapping a core position of each neuron group according to the optimal solution, to complete local search optimization;
• and
• step 6, iterating the timer, checking and updating the tabu search table, iteratively repeating step 4 to step 6 until an upper limit of iteration is reached, and finally outputting mapping results from the neuron groups to the computing cores, to complete the mapping.