Systems and Methods for Validation of a Device

A system for validating a state of a second processing device comprising:

• a first processing device including at least one first processor and a first memory, the first memory including computer-readable instructions that, when executed by the at least one first processor, cause the first processing device to perform first operations comprising:
• sending a validation request including a random number seed and a nonce;
• generating a first set of random numbers using the random number seed according to an algorithm for random number generation;
• mapping, based on a mapping model, the generated first set of random numbers to a set of memory blocks comprising a copy of software for the second processing device;
• concatenating contents of the set of mapped memory blocks to the nonce;
• calculating a first hash of the contents of the set of mapped memory blocks concatenated to the nonce;
• receiving, from the second processing device, a second hash in response to the sending of the validation request, the second hash having been calculated by the second processing device using information included in the validation request, the mapping model, the software for the second processing device, and the nonce;
• comparing the first hash to the second hash;
• and
• automatically performing an action when the first hash and the second hash do not match.

A non-transitory computer-readable storage medium having first instructions and second instructions recorded thereon for validating a second processing device, wherein when the first instructions are executed on a first processing device, the first instructions cause the first processing device to perform first operations comprising:

• sending a validation request including a random number seed and a nonce;
• generating a first set of random numbers using the random number seed according to an algorithm for random number generation;
• mapping, based on a mapping model, the generated first set of random numbers to a set of memory blocks comprising a copy of software for the second processing device;
• concatenating contents of the set of mapped memory blocks to the nonce;
• calculating a first hash of the contents of the set of mapped memory blocks concatenated to the nonce;
• receiving, from the second processing device, a second hash in response to the sending of the validation request, the second hash having been calculated by the second processing device using information included in the validation request, the mapping model, the software for the second processing device, and the nonce;
• comparing the first hash to the second hash;
• and
• automatically performing an action when the first hash and the second hash do not match.