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US 2025/0165342 A1Published application
Grouping and error correction for non-volatile memory cells
AssigneeSilicon Storage Technology, Inc.
InventorHieu Van Tran
Life of this patent
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Abstract
Numerous examples are disclosed of an improved grouping and error correction system for non-volatile memory cells. In one example, a system comprises a memory array comprising non-volatile memory cells arranged into rows and columns, wherein the array stores a plurality of words, wherein respective words are divided into multiple sub-words and respective non-volatile memory cells in the memory array store digital bits belonging to different sub-words of the plurality of sub-words.
Claims19
A system comprising:
- a memory array comprising non-volatile memory cells arranged into rows and columns, wherein the array stores a plurality of words, wherein respective words are divided into multiple sub-words and respective non-volatile memory cells in the memory array store digital bits belonging to different sub-words of the plurality of sub-words.
A method comprising:
- storing a plurality of words in a memory array comprising non-volatile memory cells arranged into rows and columns, the plurality of words divided respectively into multiple sub-words and respective ones of the non-volatile memory cells store a plurality of digital bits belonging to different sub-words.
Dependencies are inferred from the claim text.