Data processing method and apparatus
OwnerDexun Zenginventor
Life of this patent
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Abstract
A data processing method and apparatus are provided. The method includes obtaining, by a processor, a first request associated with a first input/output (I/O) task, determining, based on a first correspondence, a first processor core that is of the processor and that corresponds to the first request, where the first correspondence is a correspondence between an I/O task and a processor core, and determining, from a memory set corresponding to the first processor core, a target memory corresponding to the first request.
Claims18
A data processing method, comprising:
- obtaining, by a processor, a first request, wherein the first request is associated with a first input/output (I/O) task;
- determining, based on a first correspondence, a first processor core that is of the processor and that corresponds to the first request, wherein the first correspondence is a correspondence between an I/O task and a processor core;
- and
- determining, from a memory set corresponding to the first processor core, a target memory corresponding to the first request.
A data processing apparatus, comprising:
- a processor;
- and
- a non-transitory storage connected to the processor and including program instructions, wherein the non-transitory storage and the program instructions are configured, with the processor, to cause the apparatus to at least,
- obtain a first request, wherein the first request is associated with a first input/output I/O task;
- determine, based on a first correspondence, a first processor core corresponding to the first request, wherein the first correspondence is a correspondence between an I/O task and a processor core;
- and
- determine, from a memory set corresponding to the first processor core, a target memory corresponding to the first request.
A chip, wherein the chip is coupled to a non-transitory storage, and is configured to read and execute program instructions stored in the storage to:
- obtain a first request, wherein the first request is associated with a first input/output I/O task;
- and
- determine, based on a first correspondence, a first processor core corresponding to the first request, wherein the first correspondence is a correspondence between an I/O task and a processor core, wherein
- determine, from a memory set corresponding to the first processor core, a target memory corresponding to the first request.
Dependencies are inferred from the claim text.