On-chip qlc and tlc mix operation

A method of operating a memory device including a plurality of memory cells, the method comprising:

• operating in both a quad-level cell (QLC) mode and a triple-level cell (TLC) mode, wherein operating in both the QLC mode and the TLC mode includes
• performing at least one of a QLC programming operation and a QLC read operation on one or more of the plurality of memory cells,
• performing a TLC programming operation on one or more of the plurality of memory cells, and
• selectively switching between the QLC mode and the TLC mode.

A memory device, comprising:

• a plurality of memory cells;
• and
• control means for operating the memory device in both a quad-level cell (QLC) mode and a triple-level cell (TLC) mode, wherein the control means
• to operate in the QLC mode, performs at least one of a QLC programming operation and a QLC read operation on one or more of the plurality of memory cells,
• to operate in the TLC mode, performs a TLC programming operation on one or more of the plurality of memory cells, and
• selectively switches between the QLC mode and the TLC mode.