Device having page buffer, memory system, and method of operating the same
AssigneeYangtze Memory Technologies Co., Ltd.
InventorWeijun WAN
Life of this patent
Estimating the term…
Abstract
In one aspect, a page buffer includes a first latch configured to store program verification information; a second latch configured to store first bit line forced information; and a dynamic latch configured to store second bit line forced information. The first bit line forced information is different from the second bit line forced information. The dynamic latch includes a control switch coupled to the second latch. And the dynamic latch is configured to store information through a capacitor to which the control switch is coupled.
Claims20
A page buffer, comprising:
- a first latch;
- a second latch;
- a data latch;
- and
- a dynamic latch comprising a control switch and a capacitor, wherein the capacitor and the second latch are coupled to the control switch.
A memory device, comprising:
- a memory cell array comprising a memory cell string and a bit line connected to the memory cell string;
- and
- a peripheral circuit coupled to the bit line and comprising a page buffer connected to the bit line, wherein the page buffer comprises:
- a first latch;
- a second latch;
- a data latch;
- and
- a dynamic latch comprising a control switch and a capacitor, wherein the capacitor and the second latch are coupled to the control switch.
A method of programming a memory device comprising a first latch, a second latch, a data latch, and a dynamic latch, the method comprising:
- performing three sensing operations;
- and
- storing three results of the three sensing operations to the first latch, the second latch, and the dynamic latch, respectively.
Dependencies are inferred from the claim text.