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US 2025/0164533 A1Published application
Semiconductor device, test apparatus and method for testing semiconductor chip
AssigneeSK hynix Inc.
InventorChul Hee OH
Life of this patent
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Abstract
In an embodiment of the present disclosure, the frequency of a test signal and the speed of a test for a second circuit block to be tested are adjusted based on a measurement value for a first circuit block which represents the characteristics of a semiconductor device. Therefore, the efficiency of a test on the semiconductor device may be improved by reducing a time required for the entire test while maintaining the stability and performance of the test.
Claims20
A test apparatus comprising:
- a sampling circuit configured to output, during a first test period, a first test input signal to a first circuit block included in each of a plurality of semiconductor devices to be tested, and receive a first test output signal outputted from the first circuit block;
- and
- a test control circuit configured to output, during a second test period, a second test input signal having a test frequency set for each of the plurality of semiconductor devices, corresponding to an output frequency or an output current value of the first test output signal to a second circuit block included in each of the plurality of semiconductor devices, and perform a test on each of the plurality of semiconductor devices.
A semiconductor device comprising:
- a first circuit block configured to externally receive a first test input signal and output a first test output signal during a first test period;
- and
- a second circuit block configured to externally receive a second test input signal which has a test frequency set corresponding to an output frequency or an output current value of the first test output signal, during a second test period.
A method for testing a semiconductor chip, the method comprising:
- transmitting, during a first test period, a first test input signal to a first circuit block included in each of a plurality of semiconductor devices;
- receiving a first test output signal outputted from the first circuit block;
- classifying each of the plurality of semiconductor devices into one of N number of preset groups based on an output frequency or an output current value of the first test output signal;
- and
- transmitting, during a second test period, a second test input signal which has a test frequency set for each of the N number of preset groups to a second circuit block included in each of the plurality of semiconductor devices, where N is a natural number 2 or more.
2 more elements
Dependencies are inferred from the claim text.