Complementary metal oxide semiconductor image sensor with barrier device isolation pattern

An image sensor, comprising:

• a substrate comprising a pixel region;
• a first photoelectric conversion region in the pixel region of the substrate;
• a deep isolation pattern provided to at least partially penetrate the substrate and at least partially enclose the pixel region;
• a shallow isolation pattern provided to be in contact with the deep isolation pattern and define an active portion of the substrate;
• a first transfer gate electrode and a second transfer gate electrode in the pixel region of the substrate and at least partially vertically overlapped with the first photoelectric conversion region;
• a floating diffusion region at least partially overlapped with the first photoelectric conversion region;
• and
• a barrier device isolation pattern between the floating diffusion region and the first transfer gate electrode and the second transfer gate electrode,
• wherein the barrier device isolation pattern is spaced apart from the first transfer gate electrode and the second transfer gate electrode, and
• wherein a level of a bottom surface of the barrier device isolation pattern is higher than a level of a bottom surface of the shallow isolation pattern.

An image sensor, comprising:

• a substrate comprising a plurality of pixel regions, a first surface, and a second surface opposite to the first surface;
• a transfer gate electrode in the first surface of the substrate and at least partially extended into the substrate;
• a plurality of photoelectric conversion regions provided in the plurality of pixel regions;
• a micro lens provided on the first surface and at least partially overlapped with the plurality of photoelectric conversion regions;
• a deep isolation pattern interposed between the plurality of pixel regions and at least partially extended from the first surface into the substrate;
• a shallow isolation pattern provided to be in contact with the deep isolation pattern and define an active portion of the substrate;
• a floating diffusion region in the plurality of pixel regions and spaced apart from the plurality of photoelectric conversion regions;
• a barrier device isolation pattern interposed between the floating diffusion region and the transfer gate electrode;
• and
• an interconnection layer in the first surface of the substrate,
• wherein the barrier device isolation pattern is spaced apart from the floating diffusion region, and
• wherein a level of a bottom surface of the barrier device isolation pattern is lower than a level of a bottom surface of the floating diffusion region.