Enlarged bottom contact area in stacked transistors

A method of forming a semiconductor structure comprising:

• forming a first source/drain (S/D) region of a first transistor on a substrate;
• forming a sacrificial sheet directly on top of the first S/D region of the first transistor;
• forming a second S/D region of a second transistor, the second S/D region being on top of the first S/D region such that a portion of the first S/D region of the first transistor being vertically outside the second S/D region of the second transistor;
• depositing a dielectric layer covering the first and the second S/D region;
• creating a vertical opening in the dielectric layer, the vertical opening exposing the portion of the first S/D region;
• selectively removing at least a portion of the sacrificial sheet to create a horizontal opening directly above the first S/D region of the first transistor;
• and
• forming a S/D contact, the S/D contact having a horizontal portion in the horizontal opening and a vertical portion in the vertical opening.

A semiconductor structure comprising:

• a first nanosheet transistor on a substrate;
• a second nanosheet transistor on top of the first nanosheet transistor;
• and
• a source/drain (S/D) contact contacting a first S/D region of the first nanosheet transistor,
• wherein the S/D contact has a horizontal portion and a vertical portion, the horizontal portion extending from a sidewall of the vertical portion and covering a top surface of the first S/D region of the first nanosheet transistor.