Cut-mask patterning to remove corner- rounding of active regions of semiconductor device

A semiconductor device comprising:

• a 1st channel structure;
• a 1st source/drain region connected to the 1st channel structure;
• a 2nd source/drain region connected to the 1st channel structure;
• and
• a gate structure configured to control current flow between the 1st source/drain region and the 2nd source/drain region through the 1st channel structure,
• wherein a width of the 1st channel structure in a 2nd direction gradually changes along a 1st direction which intersects the 2nd direction.

A semiconductor device comprising:

• a 1st cell comprising a 1st active region;
• a 2nd cell comprising a 2nd active region, the 2nd cell being adjacent to the 1st cell in a 1st direction, and the 2nd active region being aligned with the 1st active region in the 1st direction;
• and
• a gate structure extended in the 2nd direction across at least one of the 1st active region and the 2nd active region,
• wherein the 1st active region has a 1st width, and the 2nd active region has a 2nd width smaller than the 1st width in the 2nd direction,
• wherein the 1st active region comprises a 1st out-corner edge, at which the 1st width gradually changes, the 1st out-corner edge being overlapped by the gate structure in a 3rd direction which intersects the 1st direction and the 2nd direction, and
• wherein the 2nd active region comprises a 1st in-corner edge at which the 2nd width less gradually changes than at the 1st out-corner edge.