FINFET Gate Structure and Related Methods

A semiconductor device, comprising:

• a gate structure formed over a fin element, wherein the gate structure includes a dielectric layer over the fin element, a capping layer disposed over the dielectric layer, and a gate electrode formed over the capping layer;
• and
• a first spacer formed on sidewalls of the capping layer and the gate electrode;
• wherein the dielectric layer includes a high-K dielectric layer that extends laterally underneath the first spacer to form a dielectric footing region;
• and
• wherein the dielectric footing region provides a capacitive coupling between the gate electrode and a channel region within the fin element, and wherein the capacitive coupling is proportional to a thickness of the first spacer.