Semiconductor Device and Method of Fabricating Thereof

A method, comprising:

• receiving a substrate having a plurality of vertically stacked channel layers;
• forming a first transistor of a first type having a channel region in a first one of the plurality of vertically stacked channel layers and forming a second transistor of a second type having a channel region in a second one of the plurality of vertically stacked channel layers;
• using spin-on deposition to deposit a dummy material laterally adjacent the first one of the plurality of vertically stacked channel layers and laterally adjacent the second one of the plurality of vertically stacked channel layers;
• and
• etching back the deposited dummy material to provide a top surface of the dummy material below the second one of the plurality of vertically stacked channel layers;
• and
• performing a process directed to the second transistor.

A method, comprising:

• forming a trench in a source drain region of a transistor stack, the trench extending through a source/drain region of an upper transistor and a lower transistor;
• depositing a dummy material filling the trench;
• etching back the dummy material to form an opening in the trench in the source/drain region of the upper transistor and the etched back dummy material disposed in the source/drain region of the lower transistor;
• depositing a dielectric liner on sidewalls of the opening in the source/drain region of the upper transistor;
• removing the etched back dummy material;
• and
• forming a first epitaxial region associated with the lower transistor while the dielectric liner is on the sidewalls of the opening in the source/drain region of the upper transistor.