Semiconductor device and method of fabricating the same

A semiconductor device, comprising:

• a substrate comprising a first active region and a second active region;
• a first gate conductive pattern that extends conformally in a first recess of the first active region;
• and
• a second gate conductive pattern that at least partially fills a second recess of the second active region,
• wherein the first gate conductive pattern comprises a first p-type conductive pattern and a first n-type conductive pattern that are sequentially stacked and extend conformally in the first recess,
• wherein the second gate conductive pattern comprises a second p-type conductive pattern that extends conformally in the second recess of the second active region and a second n-type conductive pattern that is on the second p-type conductive pattern and at least partially fills a portion of the second recess that is unoccupied by the second p-type conductive pattern, and
• wherein a first work function of the first gate conductive pattern is less than a second work function of the second gate conductive pattern.

A semiconductor device, comprising:

• a substrate comprising a cell area and a peripheral area, the substrate comprising a first active region and a second active region on the peripheral area;
• a first gate conductive pattern that extends conformally in a first recess in the first active region;
• a second gate conductive pattern that at least partially fills a second recess in the second active region;
• first and second lower gate electrodes on the first and second gate conductive patterns, respectively;
• first and second upper gate electrodes on the first and second lower gate electrodes, respectively;
• first and second barrier patterns between the first and second lower gate electrodes and the first and second upper gate electrodes, respectively;
• and
• first and second capping patterns on top surfaces of the first and second upper gate electrodes, respectively
• wherein the first gate conductive pattern has a first thickness in a horizontal direction on an inner lateral surface of the first recess,
• wherein the second gate conductive pattern has a second thickness in the horizontal direction on an inner lateral surface of the second recess, and
• wherein the first thickness is less than the second thickness.