Storage device

A storage device comprising a plurality of layers each comprising a memory cell comprising a transistor and a capacitor

• wherein the plurality of layers are stacked,
• wherein the transistor comprises:
• an oxide semiconductor over a first insulator;
• a first conductor and a second conductor over the oxide semiconductor;
• a second insulator over the first conductor and the second conductor;
• a third insulator over the second insulator;
• a fourth insulator over the oxide semiconductor;
• and
• a third conductor over the fourth insulator,
• wherein the third insulator is over and in contact with the third conductor, the second insulator, and the fourth insulator,
• wherein the second insulator comprises a first opening comprising a region overlapping with the oxide semiconductor,
• wherein the fourth insulator and the third conductor are in the first opening,
• wherein the second insulator and the third insulator each comprise a second opening comprising a region overlapping with the second conductor,
• wherein the capacitor comprises a fourth conductor in contact with a top surface of the second conductor, a fifth insulator over the fourth conductor, and a fifth conductor over the fifth insulator,
• wherein the fourth conductor, the fifth insulator, and the fifth conductor are in the second opening,
• wherein the second insulator comprises a third opening,
• wherein the first insulator comprises a fourth opening,
• wherein the third insulator comprises a fifth opening,
• wherein the third opening, at least part of the fourth opening, and at least part of the fifth opening overlap with one another in a plan view,
• wherein a sixth conductor and part of the first conductor are in the third opening, and
• wherein the sixth conductor comprises a region in contact with part of a top surface and part of a side surface of the first conductor.