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US 2025/0159919 A1Published application
Transistor
AssigneeJapan Display Inc.
InventorMasumi NISHIMURA
Life of this patent
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Abstract
A transistor includes an amorphous substrate, a first buffer layer over the amorphous substrate, a first nitride semiconductor layer in an island-shaped pattern over the first buffer layer, a second nitride semiconductor layer over the first nitride semiconductor layer so as to cover the first nitride semiconductor layer, and a gate electrode layer over the second nitride semiconductor layer so as to overlap the first nitride semiconductor layer.
Claims13
A transistor, comprising:
- an amorphous substrate;
- a first buffer layer over the amorphous substrate;
- a first nitride semiconductor layer in an island-shaped pattern over the first buffer layer;
- a second nitride semiconductor layer over the first nitride semiconductor layer so as to cover the first nitride semiconductor layer;
- and
- a gate electrode layer over the second nitride semiconductor layer so as to overlap the first nitride semiconductor layer.
3 more elements
Dependencies are inferred from the claim text.