Gate isolation features
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsTzu-Chung Wang, Chih-Chang Hung
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Abstract
Devices with isolated metal structures and methods of fabrication are provided. A method for isolating a metal gate includes forming a gate line over a semiconductor substrate; patterning a mask over the gate line, wherein an opening in the mask is located over a region of the gate line to be removed; performing an etching process through the opening to form a trench; and forming an isolation feature in the trench, wherein the isolation feature is selectively formed with no air gap, with a small air gap, or with a full air gap.
Claims20
A method for isolating a metal gate, the method comprising:
- forming a gate line over a semiconductor substrate;
- patterning a mask over the gate line, wherein an opening in the mask is located over a region of the gate line to be removed;
- performing an etching process through the opening to form a trench;
- and
- forming an isolation feature in the trench, wherein the isolation feature is selectively formed with no air gap, with a small air gap, or with a full air gap.
A method comprising:
- designing a layout of an integrated circuit including a device comprising a first gate structure and a second gate structure separated by an isolation feature;
- determining a desired device performance condition and/or a desired process yield condition;
- selecting a structure of the isolation feature to provide the desired device performance condition, wherein the structure of the isolation feature comprises a selected shape;
- and
- performing an integrated circuit fabrication process comprising:
- forming a gate line over a semiconductor substrate;
- performing an etching process to remove a portion of the gate line and form a trench with the selected shape;
- and
- forming an isolation feature in the trench, wherein the isolation feature is selectively formed with no air gap, with a small air gap, or with a full air gap.
An integrated circuit device comprising:
- a semiconductor substrate;
- a first gate structure and a second gate structure located over the semiconductor substrate and aligned in a line;
- and
- an isolation feature located between and separating the first gate structure and the second gate structure, wherein the isolation feature has a selected shape and includes an air gap having a selected size.
Dependencies are inferred from the claim text.