Integrated circuit

An integrated circuit, comprising:

• a metal/dielectric layer having a first dielectric layer and a first conductive feature in the first dielectric layer;
• a second dielectric layer over the metal/dielectric layer;
• a memory structure over the first conductive feature, surrounded by the second dielectric layer, and in contact with a first portion of a tapered sidewall of the second dielectric layer;
• a third dielectric layer over the second dielectric layer, surrounding the memory structure, and in contact with a second portion of the tapered sidewall of the second dielectric layer;
• and
• a second conductive feature over the memory structure.

An integrated circuit, comprising:

• a metal/dielectric layer having a first dielectric layer and a conductive feature in the first dielectric layer;
• a second dielectric layer over the metal/dielectric layer, wherein the second dielectric layer has a flat top surface and a tapered sidewall extending from the flat top surface of the second dielectric layer to the conductive feature;
• a bottom electrode over the conductive feature and in contact with the tapered sidewall of the second dielectric layer, wherein the flat top surface of the second dielectric layer is free from coverage by the bottom electrode;
• a resistance switch element over the bottom electrode;
• and
• a top electrode over the resistance switch element.