Semiconductor device

A semiconductor device, comprising:

• a substrate that comprises a cell region, a peripheral region at least partially surrounding the cell region, and an interface region between the cell region and the peripheral region;
• an active pattern on the substrate;
• a gate structure on the active pattern;
• a bit line electrically connected to the active pattern;
• a dummy line on the interface region;
• a first outer dummy spacer that contacts a first outer sidewall of the dummy line;
• a second outer dummy spacer that contacts a second outer sidewall of the dummy line;
• and
• an inner dummy spacer that contacts inner sidewalls of the dummy line,
• wherein the inner dummy spacer is between the first outer dummy spacer and the second outer dummy spacer.

A semiconductor device, comprising:

• a substrate;
• an active pattern on the substrate;
• a device isolation layer that at least partially surrounds the active pattern;
• a gate structure that extends in a first direction on the active pattern;
• a dielectric pattern and a dummy dielectric pattern that are on the gate structure;
• a bit line that extends in a second direction on the dielectric pattern, the second direction intersecting the first direction;
• a gate contact electrically connected to the gate structure;
• a dummy line on the dummy dielectric pattern and between the gate contact and the bit line;
• a bit-line contact that electrically connects the bit line and the active pattern to each other;
• a node contact electrically connected to the active pattern;
• a landing pad electrically connected to the node contact;
• an inner dummy spacer at least partially surrounded by the dummy line;
• and
• a dummy dielectric layer at least partially surrounded by the inner dummy spacer,
• wherein a bottom surface of the inner dummy spacer contacts a top surface of the dummy dielectric pattern, and
• wherein the dummy dielectric layer extends into the dummy dielectric pattern and contacts the gate structure.