Decoder circuits for the transmission of video media using spread spectrum direct sequence modulation
AssigneeHYPHY USA Inc.
InventorsRobert Steven HANNEBAUER, Robert J. CLARKE
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Abstract
The present invention relates generally to video or other media transmission, and more particularly, to encoding and decoding of video media that has been transmitted between a video source and a video sink using spread spectrum direct sequence (SSDS) modulation.
Claims43
1-17. (canceled)
A method of decoding differential pairs of signals of encoded video media samples into a video media sample, comprising:
- (a) receiving over a transmission medium (L) differential pairs of signals of encoded video media samples that have been encoded using Spread Spectrum Direct Sequence (SSDS) codes, each code having a length L>=2;
- (b) applying (L) chip values of one of the SSDS codes to the received (L) differential pairs of signals respectively;
- (c) multiplying the (L) differential pairs of signals by either (+1) or (−1) depending upon a state of the L chip values applied to each of the (L) differential pairs of signals respectively;
- (d) storing the multiplied (L) differential pairs of signals in a first capacitor bank, the first capacitor bank having first set of (L) capacitors and second set of (L) capacitors each for storing a charge commensurate with a product result from the multiplication of the (L) differential pairs of signals respectively;
- and
- (e) generating a decoded, differential, video media sample by:
- (i) generating averages of the charges accumulated on the first set of capacitors and on the second set of capacitors respectively;
- and
- (ii) generating the decoded, differential, video media sample from a differential amplifier arranged to receive the averages of the charges accumulated on the first set of capacitors and the second set of capacitors respectively.
A decoder track for decoding encoded video media signals that have been encoded using Spread Spectrum Direct Sequence (SSDS) codes, the decoder track comprising:
- a chip multiplier configured to multiply (L) SSDS encoded video media signals with (L) SSDS chip values from one of the SSDS codes respectively;
- a storage bank with (L) storage elements, each storage element configured to store a signal commensurate with a product resulting from the multiplication of one of the (L) SSDS encoded video media signals with one of the (L) SSDS chip values respectively;
- an averaging element configured to average the signals stored on the (L) storage elements;
- and
- an output terminal configured to provide a decoded video media signal output that is derived from the average of the signals stored on the (L) storage elements.
The decoder track of 36, further comprising a differential amplifier configured to receive the average signal stored on the first set of storage elements and the second set of storage elements and to provide the differential decoded video media signal output at the differential output terminal.
A decoder track apparatus for generating a sample video signal by decoding (L) signals of encoded video media using a Spread Spectrum Direct Sequence (SSDS) code by generating an average signal value derived from averaging signal values stored on (L) storage devices arranged in a first bank, the (L) stored signal values derived from multiplying the (L) signals of encoded video media with (L) SSDS chip values from said SSDS code respectively.
A method of decoding differential pairs of signals of encoded video media samples into a video media sample, comprising:
- (a) receiving over a transmission medium (L) differential pairs of signals of encoded video media samples that have been encoded using Spread Spectrum Direct Sequence (SSDS) codes, each code having a length L>=2;
- (b) applying (L) chip values of one of the SSDS codes to the received (L) differential pairs of signals respectively;
- (c) multiplying the (L) differential pairs of signals by either (+1) or (−1) depending upon a state of the L chip values applied to each of the (L) differential pairs of signals respectively;
- (d) alternating storing L-X of the products resulting from the multiplication of a first set of (L) differential pairs of signals and a second set of (L) differential pairs of signals in a first capacitor bank and in a second capacitor bank respectively, the first and second capacitor banks each having a first set of (L-X) capacitors and a second set of (L-X) capacitors each for storing a charge commensurate with a product from the multiplication of the (L-X) differential pairs of signals respectively, X being a positive integer greater than 0 and less than L;
- (e) alternating storing X of the products resulting from the multiplication of the first set of (L) differential pairs of signals and the second set of (L) differential pairs of signals in third capacitor bank, the third capacitor bank having a first set of (X) capacitors and a second set of (X) capacitors each for storing a charge commensurate with a product from the multiplication of the (X) differential pairs of signals respectively;
- and
- (f) generating a decoded, differential, video media sample by
- (i) generating averages of the charges accumulated on the first set of (L-X) capacitors of the first capacitor bank and the first set of (X) capacitors of the third capacitor bank, and accumulated on the second set of (L-X) capacitors of the first capacitor bank and on the second set of (X) capacitors of the third capacitor bank, respectively,
- (ii) generating the decoded, differential, video media sample from a differential amplifier arranged to receive the averages of the charges.
A decoder track for decoding encoded video media signals that have been encoded using Spread Spectrum Direct Sequence (SSDS) codes, the decoder comprising:
- a chip multiplier configured to multiply sets of (L) SSDS encoded video media signals with (L) SSDS chip values from one of the SSDS codes respectively;
- a first storage bank with (L-X) storage elements, each storage element configured to store a signal commensurate with a product resulting from the multiplication of one of the (L) SSDS encoded video media signals of a first set of said sets with one of the (L) SSDS chip values respectively, X being a positive integer greater than 0 and less than L;
- a second storage bank with (L-X) storage elements, each storage element configured to store a signal commensurate with a product resulting from the multiplication of one of the (L) SSDS encoded video media signals of a second set of said sets with one of the (L) SSDS chip values respectively;
- a third storage bank with (X) storage elements, each storage element configured to store a signal commensurate with a product resulting from the multiplication of one of the (L) SSDS encoded video media signals one of said first or second sets with one of the (L) SSDS chip values respectively;
- an averaging element configured to average the signals stored on the (L) storage elements of either the first and third storage banks or the second and third storage banks;
- and
- an output terminal configured to provide a decoded video media signal output that is derived from the average of the signals stored on the (L) storage elements.
Dependencies are inferred from the claim text.