US 2025/0158632 A1 · Sample-and-hold circuit and multiplying digital-to-analog converter using same

Abstract

A sample-and-hold circuit has first and second input terminals, and first and second output terminals. The first input terminal receives a first input signal, and the second input terminal receives a second input signal. The sample-and-hold circuit includes an operational amplifier, first and second switched capacitor (SC) circuits, and a level shifting circuit. The operational amplifier has first and second input nodes and first and second output nodes. The first SC circuit is coupled to the first input terminal, the first output terminal, and the first input node. The second SC circuit is coupled to the second input terminal, the second output terminal, and the second input node. The level shifting circuit is used to level shift the voltage at the first output node and the voltage at the second output node according to at least the first input signal and the second input signal.

Claims18

Dependent claims

A sample-and-hold circuit having a first input terminal, a second input terminal, a first output terminal, and a second output terminal, the first input terminal receiving a first input signal, the second input terminal receiving a second input signal, the sample-and-hold circuit comprising:

an operational amplifier having a first input node, a second input node, a first output node, and a second output node;
a first switched capacitor (SC) circuit coupled to the first input terminal, the first output terminal, and the first input node;
a second SC circuit coupled to the second input terminal, the second output terminal, and the second input node;
and
a level shifting circuit coupled to the first output node, the first output terminal, the second output node, and the second output terminal and configured to level shift a voltage at the first output node and a voltage at the second output node according to at least the first input signal and the second input signal.

2 more elements

A multiplying digital-to-analog converter (MDAC) having a first input terminal, a second input terminal, a third input terminal, a fourth input terminal, a first output terminal, and a second output terminal, the first input terminal receiving a first input signal, the second input terminal receiving a second input signal, the third input terminal receiving the second input signal, the fourth input terminal receiving the first input signal, the MDAC comprising:

an operational amplifier having a first input node, a second input node, a first output node, and a second output node;
a first switched capacitor (SC) circuit coupled to the first input terminal, the third input terminal, the first output terminal, and the first input node;
a second SC circuit coupled to the second input terminal, the fourth input terminal, the second output terminal, and the second input node;
a level shifting circuit coupled to the first output node, the first output terminal, the second output node, and the second output terminal and configured to level shift a voltage at the first output node and a voltage at the second output node;
a first load capacitor having a first terminal and a second terminal, the first terminal being electrically connected to the first output terminal;
a second load capacitor having a third terminal and a fourth terminal, the third terminal being electrically connected to the second output terminal;
a first switch coupled to the second terminal and receiving a first reference voltage;
a second switch coupled to the fourth terminal and receiving a second reference voltage;
an analog-to-digital converter (ADC) configured to generate a selection signal according to the first input signal and the second input signal;
and
a selection circuit coupled to the ADC and configured to determine the first reference voltage and the second reference voltage from a plurality of preset voltages according to the selection signal.

8 more elements

Dependencies are inferred from the claim text.

Sample-and-hold circuit and multiplying digital-to-analog converter using same

Life of this patent

Sample-and-hold circuit and multiplying digital-to-analog converter using same

Life of this patent

Abstract

Claims18