Methods and systems of utilizing analog-to-digital converter (adc) for multiply-accumulator (mac)

An analog-to-digital converter (ADC) system comprising:

• a complementary metal-oxide-semiconductor (CMOS) circuit configured to receive a charge as an input charge that is converted to a digital value;
• a capacitor configured to store the input charge and develop a voltage across the capacitor that is proportional to the input charge;
• a CMOS pre-charge circuit configured to pre-charge the capacitor to a reference voltage (Vref);
• a top plate of the capacitor that is initially held to the Vref while a bottom plate is tied to a circuit ground or an alternative fixed voltage, wherein during a charge accumulation phase, a voltage across the capacitor starts with Vref and ends at a different value based on accumulated charge;
• a CMOS voltage level comparator configured to monitor a capacitor ramp in the resolution phase and to detect when a capacitor ramp reaches a predefined voltage level;
• a synchronizer circuit configured to synchronize an asynchronous output signal of the CMOS voltage level comparator with a clock;
• a pulse generator configured to generate a pulse from a signal from the comparator followed by the synchronizer;
• and
• a N-bit latch configured to latch the counter using the pulse from the pulse generator.