Static change sense flip-flop

Abstract

Provided is a static change-sensing flip-flop. The static change-sensing flip-flop proposed herein includes a master latch and a slave latch configured to transfer and maintain input data according to a clock, and the master latch includes a pull-up network complementary circuit configured to connect to a master latch node (DN) and to prevent output of wrong data in a pull-up network operation while operating according to input data (D); a pull-down network complementary circuit configured to connect to the master latch node (DN) and to prevent output of wrong data in a pull-down network operation while operating according to a clock (CK); and a change-sensing circuit configured to prevent output of wrong data by a clock node (CS) and the master latch node (DN) in the pull-down network operation of the master latch.

Dependencies are inferred from the claim text.