Memory checking method and apparatus

Abstract

A method and apparatus for checking the contents of a memory in an integrated circuit is described. The on-chip memory checker includes a result first-in-first-out storage element (FIFO), a checksum engine coupled to the memory, and a comparison module. The method includes the steps of generating a seed value and providing the seed value to the checksum engine. During a test sequence a number of tests are applied to the memory. Each test includes the steps of (i) generating a checksum of a plurality of data values stored in a memory region of the memory by the checksum engine (ii) comparing by the comparison module the checksum with a reference value provided by the result FIFO and (iii) outputting the test result. The checksum is stored in the result FIFO as a reference value for a subsequent test. Multiple test sequences with different (random) seed values may be used.

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