Memory device, method for operating memory device, memory system
AssigneeYangtze Memory Technologies Co., Ltd.
InventorXiaojiang GUO
Life of this patent
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Abstract
Implementations provide a memory, a method for operating a memory, and a memory system. The discloses method can comprises: applying a multi-plane programming scheme to simultaneously perform programming operations on at least two memory planes of the memory device; and in response to determining that an first memory plane of the at least two memory planes has a programming failure, switching to a single-plane programming scheme to sequentially perform programming operations on the at least two memory planes.
Claims20
A method for operating a memory device that comprises a first memory plane and a second memory plane, the method comprising:
- during performing a first programming operation of the first memory plane, performing a second programming operation of the second memory plane;
- and
- in response to the first memory plane having a programming failure, sequentially performing programming operations on the first memory plane and the second memory plane, comprising:
- applying a first programming voltage on a first word line of the first memory plane, wherein the first programming voltage is less than a second programming voltage applied to the first word line during the first programming operation.
A memory device, comprising:
- a first memory plane;
- a second memory plane;
- and
- a peripheral circuit coupled to the first memory plane and the second memory plane;
- wherein the peripheral circuit is configured to:
- during perform a first programming operation of the first memory plane, perform a second programming operation of the second memory plane;
- and
- in response to the first memory plane having a programming failure, sequentially perform programming operations on the first memory plane and the second memory plane, comprises:
- apply a first programming voltage on a first word line of the first memory plane, wherein the first programming voltage is less than a second programming voltage applied to the first word line during the first programming operation.
A memory system, comprising:
- one or more memory devices configured to store data, each comprising:
- a first memory plane;
- a second memory plane;
- and
- a peripheral circuit coupled to the first memory plane and the second memory plane;
- wherein the peripheral circuit is configured to:
- during performing a first programming operation of the first memory plane, perform a second programming operation of the second memory plane;
- and
- in response to the first memory plane having a programming failure, sequentially perform programming operations on the first memory plane and the second memory plane, comprising:
- apply a first programming voltage on a first word line of the first memory plane, wherein the first programming voltage is less than a second programming voltage applied to the first word line during the first programming operation;
- and
- a memory controller coupled to one or more memory devices and configured to control the one or more memory devices.
Dependencies are inferred from the claim text.