Dynamic program performance modulation in a memory device
AssigneeWestern Digital Technologies, Inc.
InventorsSai Gautham Thoppa, Parth Amin, Anubhav Khandelwal, Abhijith Prakash
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AssigneeWestern Digital Technologies, Inc.
InventorsSai Gautham Thoppa, Parth Amin, Anubhav Khandelwal, Abhijith Prakash
Estimating the term…
The memory device includes a memory block with an array of memory cells that are arranged in word lines. The memory device also includes circuitry that is configured to program the memory cells of a selected word line in a plurality of program loops. In at least one of the program loops, the circuitry is configured to, for a programming pulse duration, ramp a selected word line voltage V_WLn to a programming voltage VPGM and then hold the selected word line voltage V_WLn at the programming voltage VPGM. In at least one checkpoint during the ramping of the selected word line voltage V_WLn to the programming voltage VPGM, the circuitry checks the selected word line voltage V_WLn and dynamically adjusts the programming pulse duration based on the check of the selected word line voltage V_WLn.
A method of performing a programming operation in a memory device, comprising the steps of:
A memory device, comprising:
An apparatus, comprising:
Dependencies are inferred from the claim text.