Vertically integrated neural network computing system and associated systems and methods

A functional high bandwidth memory (HBM) device, comprising:

• a controller die;
• one or more volatile memory dies carried by the controller die;
• a flash memory die carried by the one or more volatile memory dies, the flash memory die comprising:
• one or more rows each having a word line and two or more programmable memory cells coupled to the word line;
• and
• two or more bit lines, wherein each of the two or more bit lines is coupled to a corresponding programmable memory cell from each of the one or more rows;
• and
• a shared bus electrically coupled to each of the controller die, the one or more volatile memory dies, and the flash memory die,
• wherein the controller die is configured to control the one or more volatile memory dies and the flash memory die, through the shared bus, to implement one or more neural network computing operations within the functional HBM device.

A system-in-package (SiP) device, comprising:

• a base substrate;
• a processing unit carried by the base substrate;
• and
• a functional high-bandwidth memory (HBM) device carried by the base substrate and electrically coupled to the processing unit through a SiP bus, wherein the functional HBM device comprises:
• a controller die;
• one or more memory dies;
• a neural network computing die;
• and
• a shared bus electrically coupled to each of the controller die, the one or more memory dies, and the neural network computing die,
• wherein the controller die is configured to control the one or more memory dies and the neural network computing die, through the shared bus, to implement one or more neural network computing operations within the functional HBM device.