Emission driver, gate driver, and display device
AssigneeSamsung Display Co., Ltd.
InventorsMINWOO BYUN, MINJOO KIM
Life of this patent
Estimating the term…
Abstract
An emission driver includes emission stages including an input circuit; an inversion control circuit; an emission output circuit; a carry output circuit; and a boosting circuit. The boosting circuit includes a first transistor including a gate electrode connected to the control node, a first electrode configured to receive a next emission carry signal, and a second electrode connected to a boosting node, and a first capacitor including a first electrode connected to the control node and a second electrode connected to the boosting node.
Claims20
An emission driver comprising:
- a plurality of emission stages, wherein
- each of the emission stages includes:
- an input circuit configured to provide an input signal to a control node based on a first clock signal;
- an inversion control circuit configured to control a voltage of an inversion control node based on the first clock signal and a voltage of the control node;
- an emission output circuit configured to output a high gate voltage as an emission signal based on the voltage of the control node and output a first low gate voltage as the emission signal based on the voltage of the inversion control node;
- a carry output circuit configured to output the high gate voltage as an emission carry signal based on the voltage of the control node and output a second low gate voltage lower than the first low gate voltage as the emission carry signal based on the voltage of the inversion control node;
- and
- a boosting circuit configured to boost the voltage of the control node, and the boosting circuit includes:
- a first transistor (T5) including a gate electrode connected to the control node, a first electrode configured to receive a next emission carry signal, and a second electrode connected to a boosting node;
- and
- a first capacitor including a first electrode connected to the control node and a second electrode connected to the boosting node.
A gate driver comprising:
- a plurality of gate stages, wherein
- each of the plurality of gate stages includes:
- an input circuit configured to provide an input signal to a control node based on a first clock signal;
- a first inversion control circuit configured to control a voltage of a first inversion control node based on a voltage of the control node;
- a second inversion control circuit configured to control a voltage of a second inversion control node based on the voltage of the control node;
- a gate output circuit configured to output a high gate voltage as a gate signal based on the voltage of the control node and output a first low gate voltage as the gate signal based on the voltage of the first inversion control node or the voltage of the second inversion control node;
- a carry output circuit configured to output the high gate voltage as a gate carry signal based on the voltage of the control node and output a second low gate voltage smaller than the first low gate voltage as the gate carry signal based on the voltage of the first inversion control node or the voltage of the second inversion control node;
- and
- a boosting circuit configured to boost the voltage of the control node, and which the boosting circuit includes:
- a first transistor (T5) including a gate electrode connected to the control node, a first electrode configured to receive a next gate carry signal, and a second electrode connected to a boosting node;
- and
- a first capacitor including a first electrode connected to the control node and a second electrode connected to the boosting node.
A display device comprising:
- a display panel including a plurality of pixels;
- an emission driver including a plurality of emission stages configured to provide emission signals to the pixels;
- and
- a driving controller configured to control the emission driver, wherein
- each of the emission stages further includes:
- an input circuit configured to provide an input signal to a control node based on a first clock signal;
- an inversion control circuit configured to control a voltage of an inversion control node based on the first clock signal and a voltage of the control node;
- an emission output circuit configured to output a high gate voltage as an emission signal based on the voltage of the control node and output a first low gate voltage as the emission signal based on the voltage of the inversion control node;
- a carry output circuit configured to output the high gate voltage as an emission carry signal based on the voltage of the control node and output a second low gate voltage lower than the first low gate voltage as the emission carry signal based on the voltage of the inversion control node;
- and
- a boosting circuit configured to boost the voltage of the control node, and the boosting circuit includes:
- a first transistor (T5) including a gate electrode connected to the control node, a first electrode configured to receive a next carry signal, and a second electrode connected to a boosting node;
- and
- a first capacitor including a first electrode connected to the control node and a second electrode connected to the boosting node.
Dependencies are inferred from the claim text.