Methods and Systems for Low Latency Automated Trading
AssigneeExegy Incorporated
InventorsTimothy Gorham, David Edward Taylor, Jeremy Walter Whatley
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Abstract
Disclosed herein are automated trading engine embodiments that operate on market data and re-engineer trading logic to operate on computational resources that are capable of providing highly parallelized processing operations to improve tick to trade latency. As examples, logic resources for the automated trading engine can be deployed on an ASIC, FPGA, or GPU to implement hedging, market making, and/or aggressing strategies when defined conditions are met.
Claims37
An application-specific integrated circuit (ASIC), field programmable gate array (FPGA), or graphics processing unit (GPU) for automated trading, the ASIC, FPGA, or GPU comprising:
- circuitry that cooperates to generate a plurality of hedging orders with respect to a plurality of financial instruments, wherein the circuitry comprises first circuitry, second circuitry, and third circuitry;
- wherein the first, second, and third circuitry comprise parallelized hardware configurations and on-chip memory that are configured to operate in parallel with each other to generate the hedging orders based on new order fills for a plurality of financial instruments;
- the first circuitry configured to compute a change in position for a subject financial instrument based on data from a market gateway that represents a new order fill for the subject financial instrument;
- the second circuitry configured to determine whether a hedging action for the subject financial instrument is needed based on the computed change in position and a plurality of hedging parameters for the subject financial instrument, wherein the hedging parameters include an identification of a hedging instrument and a hedging ratio for the subject financial instrument, and wherein the hedging action operates to achieve the hedging ratio in view of the computed changed in position;
- and
- the third circuitry configured to generate a subject hedging order for the hedging instrument in accordance with the determined hedging action in response to a determination that the hedging action is needed, the subject hedging order for transmission to a trading venue.
An application-specific integrated circuit (ASIC), field programmable gate array (FPGA), or graphics processing unit (GPU) for automated trading based on (1) streaming derivatives market data, the derivatives market data pertaining to a plurality of derivatives of a plurality of financial instruments, (2) streaming underlying market data, the underlying market data pertaining to the financial instruments underlying the derivatives, (3) a plurality of pricing parameters pertaining to the derivatives and the underlying financial instruments, and (4) a plurality of configuration parameters for operational control of the automated trading, the ASIC, FPGA, or GPU comprising:
- a plurality of first circuits arranged in parallel, wherein the parallel first circuits comprise parallelized hardware configurations and on-chip memory arranged for parallel computations of a plurality of theoretical prices for a plurality of derivatives based on the streaming underlying market data and the pricing parameters;
- and
- market making circuitry connected to the parallel first circuits, wherein the market making circuitry comprises parallelized hardware configurations and on-chip memory that cooperate to generate a plurality of quotes for a plurality of derivatives according to a market making strategy and based on the computed theoretical prices.
An application-specific integrated circuit (ASIC), field programmable gate array (FPGA), or graphics processing unit (GPU) for automated trading based on (1) streaming derivatives market data, the derivatives market data pertaining to a plurality of derivatives of a plurality of financial instruments, (2) streaming underlying market data, the underlying market data pertaining to the financial instruments underlying the derivatives, (3) a plurality of pricing parameters pertaining to the derivatives and the underlying financial instruments, and (4) a plurality of configuration parameters for operational control of the automated trading, the ASIC, FPGA, or GPU comprising:
- a plurality of first circuits arranged in parallel, wherein the parallel first circuits comprise parallelized hardware configurations and on-chip memory arranged for parallel computations of a plurality of theoretical prices for a plurality of derivatives based on the streaming underlying market data and the pricing parameters;
- and
- aggressing circuitry connected to the parallel first circuits, wherein the aggressing circuitry comprises parallelized hardware configurations and on-chip memory that cooperate to generate a plurality of aggressing orders for a plurality of derivatives according to an aggressing strategy and based on the computed theoretical prices.
Dependencies are inferred from the claim text.