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US 2025/0156440 A1Published application
Data transfer with a bit vector operation device
AssigneeLodestar Licensing Group LLC
InventorsIsom Crawford, JR., Graham Kirsch, John D. Leidel
Life of this patent
Estimating the term…
Abstract
Examples of the present disclosure provide apparatuses and methods for direct data transfer. An example method comprises transferring data between a first device and a second device, wherein the first device is a bit vector operation device, and transforming the data using a data transform engine (DTE) by rearranging the data to enable the data to be stored on the first device when transferring the data between the second device and first memory device.
Claims21
(canceled)
An apparatus, comprising:
- a plurality of memory banks, wherein each memory bank of the plurality of memory banks is associated with circuitry configured to perform one or more logical operations using data stored in the plurality of memory banks without transferring the data via an input/output (I/O) interface to a host device;
- and
- a device comprising at least one controller, wherein the at least one controller is coupled with the plurality of memory banks and is configured to transmit processing-in-memory instructions to the circuitry for execution of the processing-in-memory instructions.
A memory system, comprising:
- a host;
- one or more banks of memory cells, wherein each bank of the one or more banks of memory cells is associated with circuitry configured to perform one or more logical operations using data stored in the one or more banks of memory cells without transferring the data via an input/output (I/O) interface to the host;
- and
- a device coupled with the host and comprising one or more controllers, wherein the one or more controllers are coupled with the one or more banks of memory cells and are configured to transmit processing-in-memory instructions to the circuitry for execution of the processing-in-memory instructions.
1 more element
A device, comprising:
- a plurality of memory banks;
- a device comprising one or more controllers coupled with the plurality of memory banks, the one or more controllers configured to:
- transmit processing-in-memory instructions to circuitry associated with the plurality of memory banks;
- and
- the circuitry associated with the plurality of memory banks, the circuitry configured to:
- execute the processing in-memory instructions to perform one or more logical operations using data stored in the plurality of memory banks, wherein respective logical operations of the one or more logical operations are performed without transferring the data via an input/output (I/O) interface to a host.
3 more elements
Dependencies are inferred from the claim text.