Method and system for optimizing overall throughput of a PCIe/CXL host bridge

Abstract

A method and system for optimizing overall throughput of a Peripheral Component Interconnect Express (PCIe)/Compute Express Link (CXL) host bridge. The PCIe/CXL host bridge includes a plurality of ports, and one or more devices are connected to the ports. Credits are initially allocated to the ports of the PCIe/CXL host bridge. A link status on the ports of the PCIe/CXL host bridge and/or a status of scheduled workloads on a host are then determined. The credits allocated to the ports of the PCIe/CXL host bridge are adjusted based on the link status and/or the status of scheduled workloads. A PCIe driver may detect the link status of each port of the PCIe/CXL host bridge and request to adjust the credits based on the link status. An orchestration software that is configured to schedule and switch workloads may request to adjust the credits based on the status of scheduled workloads.

Dependencies are inferred from the claim text.