Fault interface architecture in safety-relevant systems
AssigneeNXP USA, Inc.
InventorsKumar Abhishek, Vivek Kumar Yadav, Sanjaykumar Hansrajbhai Kakasaniya, Vikram Joshi, Joseph Rollin Wright
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AssigneeNXP USA, Inc.
InventorsKumar Abhishek, Vivek Kumar Yadav, Sanjaykumar Hansrajbhai Kakasaniya, Vikram Joshi, Joseph Rollin Wright
Estimating the term…
A method for handling faults in an integrated circuit system includes receiving fault interface signals from safety-critical logic and generating a fault request indicating a fault and a domain identifier based on the fault interface signals. The fault interface signals include a fault signal and a fault domain identifier signal. In an embodiment of the method, the fault interface signals include synchronous signals received from the safety-critical logic using a synchronous interface and the synchronous signals include a fault clock signal. In an embodiment of the method, generating the fault request includes asserting the fault request in response to the fault signal having a first asserted signal level and maintaining assertion of the fault request until a fault acknowledgement is received from a fault collection and control circuit.
A method for handling faults in an integrated circuit system, the method comprising:
A fault handling system in an integrated circuit system comprising:
A system-on-a-chip comprising:
Dependencies are inferred from the claim text.