US 2025/0156092 A1 · ADAPTIVE CONTROL FOR IN-MEMORY VERSIONING

Abstract

Disclosed in some examples are systems, devices, machine-readable mediums, and methods for customizing an in-memory versioning mode for each memory location according to a predicted access behavior to optimize memory device performance. Usage data in a previous time period may be utilized along with policy rules to determine whether to configure a particular memory address as a zero copy or direct copy mode. For example, memory addresses that are read frequently may be configured as direct copy mode to reduce the read latency penalty. This improves the functioning of the memory system by reducing read latency for memory addresses that are frequently read but written to less frequently, and reduces write latency for memory locations that are frequently written to, but not read as frequently.

Claims20

Dependent claims

A method comprising:

using a processor of a memory device:
selecting, for a checkpoint interval, an in-memory versioning mode for a memory location using past access information for memory accesses of the memory location, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations as a result of a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations as a result of a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations;
and
processing memory commands for the memory location according to the selected in-memory versioning mode during the checkpoint interval.

1 more element

A computing device for managing memory versioning, the computing device comprising:

a hardware processor;
a memory, the memory storing instructions, which when executed by the hardware processor cause the computing device to perform operations comprising:
selecting, for a checkpoint interval, an in-memory versioning mode for a memory location using past access information for memory accesses of the memory location, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations as a result of a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations as a result of a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations;
and
processing memory commands for the memory location according to the selected in-memory versioning mode during the checkpoint interval.

2 more elements

A non-transitory machine-readable medium, storing instructions for managing memory versioning, the instructions, which when executed, cause the machine to perform operations comprising:

selecting, for a checkpoint interval, an in-memory versioning mode for a memory location using past access information for memory accesses of the memory location, the past access information storing access information for a previous checkpoint, the selection of the in-memory versioning mode selecting either a direct copy mode or a zero copy mode, wherein the direct copy mode copies a working value from a first memory location of a pair of memory locations to a second memory location of the pair of memory locations as a result of a commit operation, the zero copy mode switches a value of a select field between the pair of memory locations as a result of a commit or rollback operation, wherein the value of the select field indicates a working location of the pair of memory locations;
and
processing memory commands for the memory location according to the selected in-memory versioning mode during the checkpoint interval.

Dependencies are inferred from the claim text.

Adaptive control for in-memory versioning

Life of this patent

Adaptive control for in-memory versioning

Life of this patent

Abstract

Claims20