Semiconductor device including bumps and method of manufacturing the same

A semiconductor device comprising:

• a first substrate;
• a second substrate that is disposed over the first substrate and that comprises a first conductive trace and a second conductive trace;
• a first pillar and a second pillar disposed between the first substrate and the second substrate;
• a first solder layer configured to cover a first surface of the first pillar;
• and
• a second solder layer configured to cover a second surface of the second pillar;
• wherein the first surface of the first pillar has a lower height than a height of the second surface of the second pillar, wherein the first surface of the first pillar is a surface of the first pillar at a farthest distance from a surface of the substrate, and the second surface of the second pillar is a surface of the second pillar at a farthest distance from the surface the substrate;
• wherein the first solder layer is connected to the first conductive trace;
• wherein the second solder layer is connected to the second conductive trace;
• and
• wherein a distance between the first surface and the first conductive trace is greater than a distance between the second surface and the second conductive trace.

A method of manufacturing a semiconductor device, comprising:

• forming a first pillar and a second pillar over a substrate;
• forming a first resist pattern comprising a first opening that exposes a first surface of the first pillar and comprising a second opening that exposes a second surface of the second pillar and that has a smaller width than the width of the first opening, wherein the first surface of the first pillar is a surface of the first pillar at a farthest distance from a surface of the substrate, and the second surface of the second pillar is a surface of the second pillar at a farthest distance from the surface the substrate;
• forming a first solder pattern within the first opening and a second solder pattern within the second opening;
• removing the first resist pattern;
• and
• forming a first solder layer by reflowing the first solder pattern and forming a second solder layer by reflowing the second solder pattern.

A semiconductor device comprising:

• a first pillar and a second pillar formed over a substrate;
• a first solder layer configured to cover a first surface of the first pillar;
• and
• a second solder layer configured to cover a second surface of the second pillar;
• wherein the second solder layer has a smaller thickness than a thickness of the first solder layer to compensate for a difference between a height of the second surface and a height of the first surface.